Using multiple Fast Ethernet cards can double or even triple the maximum throughput without increasing the cost of a PC cluster greatly.Ī novel implementation of TCP Vegas for optical burst switched networks MP_Lite M-VIA also has the ability to channel-bonding multiple network interface cards to increase the potential bandwidth between nodes. The handshake protocol and RDMA mechanism provides double the throughput that MPICH can deliver for long messages. By using the eager protocol for sending short messages, MP_Lite M-VIA has much lower latency on both Fast Ethernet and Gigabit Ethernet. The design and implementation of MP_Lite for M-VIA, which is a modular implementation of the VI architecture on Linux, is discussed in this thesis. By combining the high efficiency of MP_Lite and high performance of the VI architecture, they are able to implement a high performance message-passing library that has much lower latency and better throughput. The Virtual Interface (VI) architecture is a user-level communication protocol that bypasses the operating system to provide much better performance than traditional network architectures.
MP_Lite is a light weight message-passing library designed to deliver the maximum performance to applications in a portable and user friendly manner. Implementation of MP_Lite for the VI ArchitectureĬhen, Weiyi [Iowa State Univ., Ames, IA (United States)
The throughput curve also improves considerably by increasing the Eager/Rendezvous threshold. The superior performance offered by the MPICH-MP_Lite device compared to the MPICH-p4 device can be easily seen on the SysKonnect cards using jumbo frames. Both the blocking and non-blocking MPICH-MP_Lite Channel Interface devices perform close to raw TCP, whereas a performance loss of 25-30% is seen in the MPICH-p4 Channel Interface device for larger messages. Different network interface cards like Netgear, TrendNet and SysKonnect Gigabit Ethernet cards were used for the measurements.
The PC cluster has two 1.8 GHz Pentium 4 PCs and the Alpha cluster has two 500 MHz Compaq DS20 workstations. The performance was measured on two separate test clusters, the PC and the Alpha miniclusters, having Gigabit Ethernet connections. MP_Lite can be implemented either as a blocking or a non-blocking Channel Interface device. By attaching MP_Lite to MPICH at the lowest level, the Channel Interface, almost all of the performance of the MP_Lite library can be delivered to the applications using MPICH. The Channel Interface is the lowest layer that requires very few functions to add a new device. There are several layers in the MPICH library where one can tie a new device.
By integrating MP_Lite as a Channel Interface device in MPICH, a parallel programmer can utilize the full MPI implementation of MPICH as well as the high bandwidth offered by MP_Lite. MP_Lite is a lightweight message-passing library that is not a full MPI implementation, but offers high performance MPICH (Message Passing Interface CHameleon) is a full implementation of the MPI standard that has the p4 library as the underlying communication device for TCP/IP networks. The goal of this thesis is to develop a new Channel Interface device for the MPICH Implementation of the MPI (Message Passing Interface) standard using MP_Lite. Selvarajan, Shoba [Iowa State Univ., Ames, IA (United States) Implementation of MPICH on Top of MP_LiteĮnergy Technology Data Exchange (ETDEWEB)